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Chinese Chipmakers Pay for Every Extra Step to Avoid EUV Machines

By splitting designs into multiple patterns, firms like SMIC and CXMT continue producing advanced silicon, but the method reduces output and increases expenses.

By Yasmin Kovalenko ·

Illustration for: Chinese Chipmakers Pay for Every Extra Step to Avoid EUV Machines
Illustration generated for this article, not a news photograph.

Chinese semiconductor firms are spending more to produce advanced chips because they must use older lithography equipment multiple times. Export controls have blocked ASML’s extreme ultraviolet machines, forcing manufacturers to rely on deep ultraviolet tools. To create complex layers, these firms print the same area several times. Each additional pass adds cost, time, and the risk of defects.

The industry has long viewed this equipment gap as a major barrier. ASML is the sole producer of EUV tools, which use 13.5 nanometer light for fine printing. Some analysts estimate the technological gap between China and the West is five years or more. Despite this, Chinese companies have made progress using available tools.

A 2023 analysis of Huawei’s Mate 60 Pro showed that SMIC produced its Kirin 9000S processor using a 7 nanometer class process without EUV. Later analysis of the Kirin 9030 suggested SMIC moved its process closer to 5 nanometer densities, though it still trails TSMC and Samsung. The method relies on multiple patterning, where designers split complex layers into simpler ones.

Chris Mack, co-founder and CTO of Fractilia, noted that industry standards suggest three exposures on a 193 immersion tool cost about the same as one EUV pass. At four masks, EUV becomes cheaper. Quality issues also arise because each new pattern must align perfectly with previous ones. More exposures mean more accumulated errors, which forces designers to add space around features. This enlarges the chip and reduces the number of usable dies per wafer.

Morgan Stanley estimated in June that CXMT, a Chinese DRAM maker, produces about one-third as many bits per wafer as Western competitors. The bank described lithography access as a hard ceiling for Chinese memory development. However, DUV technology still has potential. Micron developed its 1-alpha DRAM without EUV, and Morgan Stanley believes CXMT can achieve a similar move for its HBM3e plans.

Morgan Stanley projects that CXMT will increase its share of global DRAM bit supply from 14 percent in 2026 to 16 percent in 2028. This growth would come from new capacity rather than improved yield. The bank also expects China’s AI chip self-sufficiency to rise from 42 percent in 2025 to 70 percent by 2030.

While Chinese firms can continue pushing DUV limits, they face persistent gaps in EUV, high bandwidth memory, and advanced software. Micron eventually used EUV for its 1-gamma DRAM to gain a 30 percent density advantage over the previous generation. Mack said he would be hard pressed to believe a 3 nanometer or 2 nanometer node is economically viable without EUV.

Source: Tom's Hardware

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